A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process. [electronic resource]

By: Contributor(s): Publication details: Nanoscale research letters Dec 2017Description: 418 p. digitalISSN:
  • 1931-7573
Online resources: In: Nanoscale research letters vol. 12
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Publication Type: Journal Article

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