A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process.
Hsu, Meng-Yin
A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process. [electronic resource] - Nanoscale research letters Dec 2017 - 418 p. digital
Publication Type: Journal Article
1931-7573
10.1186/s11671-017-2191-9 doi
A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process. [electronic resource] - Nanoscale research letters Dec 2017 - 418 p. digital
Publication Type: Journal Article
1931-7573
10.1186/s11671-017-2191-9 doi