Wang, Jian <br/><br/>
Single-PPLN-based simultaneous half-adder, half-subtracter, and OR logic gate: proposal and simulation.  [electronic resource] 

 -  Optics express  Feb 2007 
 - 1690-9 p.  digital 
<br/><br/> Publication Type: Journal Article 
<br/><br/><label>ISSN: </label>1094-4087 
<br/><br/><label>Standard No.: </label>10.1364/oe.15.001690  doi